The IntelliProp SATA Host App (IPC-SA101A-HI) is an industry standard Serial-ATA (SATA) host interface core that enables customers to use high throughput SATA storage devices. The protocol interface is compliant to the SATA 3.3 specification as defined by the Serial ATA International Organization (SATA-IO). The IPC-SA101A-HI SATA host core is fully verified in pseudo random simulation.
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IPC-SA101A-HI Applications
The IPC-SA101A-HI is available for FPGA developments requiring SATA connectivity and for integration into host ASIC designs to provide an industry compliant SATA 1.5 Gb/s, SATA 3.0 Gb/s, or SATA 6.0 Gb/s interface for host designs. Some of the target applications for the IPC-SA101A-HI core are:
- Enterprise storage interconnect
- High speed data acquisition
- Any system needing to connect to a SATA storage media
IPC-SA101A-HI Features
- Fully compliant to the SATA 1.5Gb/s, 3.0Gb/s, and 6.0Gb/s industry specifications
- Supports auto speed negotiation and single speed locking
- Data Interface through FIFO
- Supports either SerDes, PIPE, or SAPIS interface
- Synchronous design for easy integration
- Synthesizable Verilog design
- Power Modes (partial/slumber)
- Built in Self-Test
Provided with the SATA Host App Core
| Documentation: | Comprehensive User Documentation |
| Design File Formats: | Encrypted Verilog |
| Constraints Files: | Provided per FPGA |
| Verification: | ModelSim verification model, Testbench and Drive Model included |
| Instantiation Templates: | Verilog (VHDL wrappers available) |
| Reference Designs & Application Notes: | Synthesis and place and route scripts |
| Additional Items: | Simulation script, Sample Vectors, Reference Design |
| Simulation Tool Used: | ModelSim (contact IntelliProp for latest versions supported) |
| Support: | The purchased core is delivered and warranted against defects for 6 months from the date of delivery. Phone and email technical support is included for 6 months from the delivery date. |
| Notes: | Other simulators are available. Please contact IntelliProp for more information. |
Functional Description
The IPC-SA101A-HI is designed to be connected to a SATA-compliant device application to send and receive Out of Band (OOB) signals, primitives, and SATA Frame Information Structures (FIS). The SATA host core, as shown in the block diagram, is comprised of the PHY Layer, LNK (Link) Layer, TRN (Transport) Layer, the Application (App) Layer, SerDes, and FIFO Interfaces.