PCIe/NVMe to Orthus Bridge: IPA-AX222A-BR
The IntelliProp IPP-AX222A-BR (code name Orthus) is an Intellectual Property complex created to support Gen-Z based software development. Orthus presents as an AXI memory mapped load/store interface to a Quad core ARM A53 processor within the Xilinx Zynq FPGA and is available on the Bittware SOC FPGA card. The ARM Quad Core A53 processor and Orthus bridge are being used for development of Gen-Z in band management, fabric management and bridge scriber software.
Features
- Utilizes proven IntelliProp IP cores for Gen-Z functions
- Compliant with the Gen-Z 1.1 Core Specification and Gen-Z 1.1 Phy Specification
- Small Footprint
- AXI-MM Slave connection to Quad Core ARM A53 Processor Complex
- Low cost to entry
- Quick Kernel Boot
- Utilizes off-the-shelf Ubuntu tools
- Compliant to typical byte granularity memory transfers (e.g. linux mmap)
- Explicit Op-Class format support (Core64, Control, Atomic, etc.)
- Gen-Z requester with dual x4 (100Gbps) interface
- Linux Gen-Z bridge driver and management applications available with Gen-Z aware OS support
- Single Subnet/Single Route destination packet routing support
- Single Subnet/Single Route packet relay support
- Multi-Action VC remapping support
Performance
- MMIO: <4GBs Read/Write
- DMA: >4GBs Read/Write;
Applications
- Applications that require an industry compliant method to connect a host to a Gen-Z fabric
- Applications that require full Gen-Z feature and configuration support
Device Support:
IntelliProp’s Orthus bridge is available for integration into the Xilinx Zynq FPGA implemented on the BittWare 250-SOC FPGA board. Support for other FPGA implementations available by request.
Gen-Z OpClass Support
- Core64
- Control
- Other OpClass handled via RAW_CB
Gen-Z Payload Size Support
- 1B to 256B